Tihomir Brusev

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This paper includes investigations of power losses in monolithic buck dc-dc converter designed with Cadence on CMOS 0.35 µm process. Input voltage of the designed circuit is equal to 3.6 V and output voltage is regulated to 1.2 V. Evaluated and estimated are power dissipations in the MOS transistor, filter inductor and filter capacitor of the buck(More)
This paper concerns the technological limitation of fully monolithic dc-dc converters. Two types of circuits were investigated on AMS CMOS 0.35 µm process. Comparison between efficiency results of architectures used on-chip and off-chip filter's inductors are made. The inductors influence over the dc-dc converters performance is evaluated. Input voltage of(More)
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