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STT-RAM has emerged as one of the most promising candidates for future on-chip cache due to STT-RAM's high density and low leakage. However, the STT-RAM has many disadvantages, such as: high write energy and long writing latency. To alleviate the problems, many STT-RAM and SRAM hybrid cache architectures have been proposed. In this paper, we propose a(More)
With the development of Graphics Processing Unit (GPU) and the Compute Unified Device Architecture (CUDA) platform, researchers shift their attentions to general-purpose computing applications with GPU. In this paper, we present a novel parallel approach to run artificial fish swarm algorithm (AFSA) on GPU. Experiments are conducted by running AFSA both on(More)
As power consumption continues to increase dramatically in real-time systems, the thermal management has become a prominent issue. Taking leakage current into account, this paper focuses on the maximum temperature minimization for the processor executing a set of real-time tasks with a common deadline. We prove that, for a specific interval, constant-speed(More)
With the rapid growth in demand of massive data processing and the limitation of process development in microprocessor, GPGPU gains more and more attentions to provide huge power of data parallelism. Tightly-coupled CPU and GPGPU that share the LLC (last level cache) enables fine-grained workload offload between CPU and GPGPU. In the paper, we focus on one(More)
The L2 cache is commonly managed using LRU policy. For workloads that have a working set larger than L2 cache, LRU behaves poorly, resulting in a great number of <i>less reused lines</i> that are never reused or reused for few times. In this case, the cache performance can be improved through retaining a portion of working set in cache for a period long(More)
Multi-core technologies are widely used in embedded systems and the resource allocation is vita to guarantee Quality of Service (QoS) requirements for applications on multi-core platforms. For heterogeneous multi-core systems, the statistical characteristics of execution times on different cores play a critical role in the resource allocation, and the(More)
Mobile computing is popular when wireless network has been deployed almost everywhere. Smartphones have been the important tools in our society for the abundant functions including communication, entertainment and online office etc as the pivotal devices of mobile computing. Smartphone software development has also become more important than before. Android(More)
With the development of the semiconductor industry, more processors can be integrated onto a single chip. Network-on-Chip (NoC) is an efficient solution for the interconnections on chip for many-core system with many processor cores on chip. However, enhancing performance with lower power consumption is still a challenge. The core issue is the mapping of(More)
The growing number of processing cores in a single CPU is demanding more parallelism from sequential programs. But in the past decades few work has succeeded in automatically exploiting enough parallelism, which casts a shadow over the many-core architecture and the automatic parallelization research. However, actually few work was tried to understand the(More)