This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the Microgrid of microthreaded architecture, a multi-core architecture capable of integrating hundreds to hundreds of thousands of processors on single silicon chip. We use the Abstract State Machine (ASM) as a theoretical framework for the specification of the… (More)
The SANE Virtual Processor (SVP) is a fine-grain, thread-based model of concurrent program composition developed and used at the University of Amsterdam as a basis for designing and programming many-core chips. Its design goal was to support dynamic concurrency and hence support self-adaptive systems within the AETHER collabora-tive European project. It… (More)
We present a rule format for structural operational semantics to guarantee that the associated labelled transition system is bounded nondeterministic.
This paper presents a formal approach to the verification and evaluation of a programming/machine model being developed at the University of Amsterdam, called the SANE Virtual Processor (SVP). The model is being used as a basis for designing and programming chip multiprocessors and to support self-adaptive computation. This model can provide solutions for… (More)
Bergstra, Ponse and van der Zwaag introduced in 2003 the notion of orthogonal bisimulation equivalence on labeled transition systems. This equivalence is a refinement of branching bisimulation, in which consecutive τ-actions (silent steps) can be compressed into one (but not zero) τ-actions. The main advantage of orthogonal bisimulation, compared to… (More)
Motivation: Equipped with sophisticated biochemical measurement techniques we generate a massive amount of biomedical data that needs to be analyzed computationally. One long-standing challenge in automatic knowledge extraction is clustering. We seek to partition a set of objects into groups such that the objects within the clusters share common traits.… (More)