Thuy Do

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Degradation of lithographic pattern fidelity is a major cause of yield loss in VLSI manufacturing. A general methodology for full-chip analysis and improvement of yield loss due to lithographic effects is proposed. The approach is based on: a) extraction of pattern fidelity statistics using a full-chip layout engine, b) full-chip Optical Proximity(More)
Graphical abstract Highlights  CT networks were developed with heparin-mimicking monosodium 5-sulfoisophthalate  Tunable degradation profiles were observed in aqueous media up to 30 days  No toxic response was observed with L929 mouse fibroblasts  Native CT antibacterial activity was retained with Porphyromonas gingivalis Abstract Chitosan (CT) is an(More)
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