Thilak K. Poriyani House Raju

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We compare designs of low-power CMOS comparators with programmable hysteresis. We chose two baseline comparators: a two-stage CMOS op-amp with output inverter and a folded-cascode op-amp with output inverter. To these baseline circuits, we add programmable hysteresis using two methods. The first method uses positive feedback to unbalance the input(More)
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