Theodor Hillebrand

Learn More
An analog system's performance can be influenced by many factors such as age-dependent degradation effects which need to be considered during the design process. Transistor level degradation analysis is very time-consuming for large and complex circuits. Behavioral models can be used to speed up the simulation and enable an evaluation on a higher(More)
Ring oscillators exhibit a strong temperature dependency. Additionally, degradation in CMOS transistors affects the performance of circuits over time and is strongly dependent on temperature during circuit operation. In order to design robust and reliable ring oscillator-based circuits, both temperature dependencies have to be considered. This work(More)
Scaled down CMOS transistors are prone to degradation and process variation. This necessitates a transistor model that provides an insight into the internal dependencies between these two crucial effects. Models for modern transistors and their degradation behavior are hardly attachable. This paper proposes a modified BSIM6 model which includes degradation(More)
In modern CMOS processes, several non-ideal influences affect the functionality of integrated circuits. In order to analyze and reduce these influences, time intensive circuit simulations are performed at transistor level. Although numerous non-idealities are considered in such simulations, they cannot be analyzed separately since they are inherent parts of(More)
—In this paper a reliability-aware design method based on the gm /I D-methodology is presented which allows designers of integrated analog circuits to consider process as well as environmental variations and aging effects already at early design stages. Within this method the whole simulation effort is shifted to a single transistor level. With a generated(More)
In this paper a tool based on the g<inf>m</inf>/I<inf>D</inf>-methodology is presented to provide information on operating point-dependent degradation in integrated circuits caused by NBTI and HCI during early design stages. The advantage of the presented GMID-Tool is that it does not require any further SPICE or aging simulations after the extraction of(More)
In this paper a comprehensive analysis of 12 different extraction methods for the threshold voltage V<inf>th</inf> is presented. Accounting for the emerging needs of advanced technology nodes the methods are evaluated with TCAD simulations of FDSOI, Bulk and Fin MOSFET devices. The presented analysis provides Figures of Merit in order to choose the most(More)