Theodor Hillebrand

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An analog system's performance can be influenced by many factors such as age-dependent degradation effects which need to be considered during the design process. Transistor level degradation analysis is very time-consuming for large and complex circuits. Behavioral models can be used to speed up the simulation and enable an evaluation on a higher(More)
Scaled down CMOS transistors are prone to degradation and process variation. This necessitates a transistor model that provides an insight into the internal dependencies between these two crucial effects. Models for modern transistors and their degradation behavior are hardly attachable. This paper proposes a modified BSIM6 model which includes degradation(More)
Ring oscillators exhibit a strong temperature dependency. Additionally, degradation in CMOS transistors affects the performance of circuits over time and is strongly dependent on temperature during circuit operation. In order to design robust and reliable ring oscillator-based circuits, both temperature dependencies have to be considered. This work(More)
Process variation and aging effects influence the performances of integrated circuits in modern technology nodes. In this paper, a method is proposed to build a behavioral model to represent the influences of process variation, aging and operational parameters on circuit performances. The variability of performance is represented using distribution(More)
In modern CMOS processes, several non-ideal influences affect the functionality of integrated circuits. In order to analyze and reduce these influences, time intensive circuit simulations are performed at transistor level. Although numerous non-idealities are considered in such simulations, they cannot be analyzed separately since they are inherent parts of(More)
In this paper a tool based on the g<inf>m</inf>/I<inf>D</inf>-methodology is presented to provide information on operating point-dependent degradation in integrated circuits caused by NBTI and HCI during early design stages. The advantage of the presented GMID-Tool is that it does not require any further SPICE or aging simulations after the extraction of(More)
Reliable design flows for integrated CMOS circuits must take into account all effects that influence whole circuits or several single transistors. For larger technology nodes it was sufficient to design a circuit with respect to pure electrical properties like voltages, currents or capacitance. However, the progressive downscaling of CMOS transistors(More)