Thawatchai Thongleam

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This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 μm 0.4 V CMOS technology and analyzed using PSPICE with(More)
An ultra low voltage rail-to-rail DTMOS voltage follower is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and SPICE is used to verify the circuit performance. The voltage follower can drive ± 0.25 V to the 500 Ω with(More)
A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The(More)
This paper presents a 0.8 V class-AB linear operational transconductance amplifier (OTA) using DTMOS for high-frequency applications. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 μm CMOS technology under 0.8 V supply. The(More)
This paper presents a low voltage CMOS pseudo differential OTA using simple feed-forward technique. The circuit employs feed-forward technique to suppress the common-mode gain, and positive feedback to enhance the output impedance. The circuit is designed using 0.18 µm CMOS technology under 0.5 V supply. The simulation results show rail-to-rail(More)
A bulk-driven super MOS transistor (BD-SMT) for low voltage operation is presented. The proposed transistor achieves a high effective transconductance (G<sub>m(eff)</sub>), high effective drain impedance (R<sub>D(eff)</sub>) and low effective source impedance (R<sub>S(eff)</sub>). BD-SMT is designed based on regulated self-cascode and negative feedback(More)
A 1-V fully differential second-generation current conveyer (FDCCII) is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors in order to rail-to-rail operation. To increase DC gain, the feedforward circuits technique are employed in this design. The low voltage FDCCII is verified by using HSPICE in 0.18 &#x03BC;m(More)
This paper presents a 0.5 V pseudo fully differential CMOS op-amp with rail-to-rail input/output swing. The circuit is designed based on class AB input and output stages. In the design, quasi FGMOS transistors are employed. The proposed amplifier is designed using 0.18 &#x03BC;m CMOS technology, and the simulation results show rail-to-rail input and output(More)
This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed(More)
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