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Soybean cultivars resistant to Pseudomonas syringae pathovar glycinea (Psg), the causal agent of bacterial blight, exhibit a hypersensitive (necrosis) reaction (HR) to infection. Psg strains carrying the avrB gene elicit the HR in soybean cultivars carrying the resistance gene Rpg1. Psg expressing avrB at a high level and capable of eliciting the HR in the(More)
DNA sequences complementary to three indoleacetic acid (IAA)-inducible mRNAs in pea epicotyl tissue were isolated by differential plaque filter hybridization of cDNA libraries constructed in the vector lambda gt10. Clone pIAA6 hybridized to an mRNA encoding the previously identified translational product polypeptide 6 (Mr 22,000), and clone pIAA4/5(More)
Amyloid beta-protein precursor (ABPP) of Alzheimer's disease (AD) represents a family of proteins which includes the parent protein which generates a small (4 kD) fragment that self-assembles to form amyloid fibrils in AD. Thus, the normal and abnormal proteolysis of ABPP may be directly relevant to AD pathogenesis. We have examined the accumulation of ABPP(More)
We describe a model system for studying developmentally regulated transcription during spore formation in Bacillus subtilis. This model system is a cloned cluster of genes known as 0.4 kb, ctc, and veg from the purA-cysA region of the B. subtilis chromosome. Each gene exhibited a distinct pattern of transcription in cells growing in glucose medium and in(More)
An antiserum was raised against an amino acid sequence predicted from the DNA sequence of amyloid beta-protein precursor (ABPP), and it was then affinity-purified. This affinity-purified antibody (anti-GID) intensely stained neurons and dystrophic neurites in plaques of Alzheimer's disease (AD) patients, but marginally stained neurons of age-matched normal(More)
Applications requiring double precision (DP) arithmetic executed on embedded CPUs without native DP support suffer from prohibitively low performance and power efficiency. Hybrid reconfigurable CPUs, allowing for reconfiguration of the instruction set at runtime, appear as a viable computing platform for applications requiring instructions not supported by(More)
—One challenging task for VLSI and reconfigurable system design is the identification of the smallest number format possible to implement a given numerical algorithm guaranteeing some final accuracy while minimising area used, execution time and power. We apply affine arithmetic, an extension to interval arithmetic, to estimate the rounding error of(More)
Embedded CPUs typically use much less power than desktop or server CPUs but provide limited or no support for floating-point arithmetic. Hybrid reconfigurable CPUs combine fixed and reconfigurable computing fabrics to balance better execution performance and power consumption. We show how a Stretch S6 hybrid reconfigurable CPU (S6) can be extended to(More)
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