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Monitoring the quality of raw poultry by detecting hydrogen sulfide with printed sensors
Abstract Food quality and safety are controlled by legislation and monitored both by food industry players and regional and national authorities in a food supply chain. The need for more preciseExpand
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13.5 A 0.35-to-2.6GHz multilevel outphasing transmitter with a digital interpolating phase modulator enabling up to 400MHz instantaneous bandwidth
TLDR
This paper introduces a multilevel outphasing transmitter with four amplitude levels, including the first prototype implementation based on the digital interpolating phase modulator concept and has been verified to operate with instantaneous bandwidth up to 400MHz. Expand
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Class D CMOS power amplifier with on/off logic for a multilevel outphasing transmitter
TLDR
We present a class D power amplifier (PA) design in 28 nm CMOS for a multilevel outphasing transmitter. Expand
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Operational amplifier design for high-speed pipelined Analog-to-Digital Converters in deep-submicron CMOS processes
TLDR
In this paper, design challenges of an operational amplifier (opamp) for medium-resolution pipelined Analog-to-Digital Converters in deep-submicron CMOS processes are discussed. Expand
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A configurable sampling rate converter for all-digital 4G transmitters
TLDR
This paper presents a digital interpolation chain for non-integer variable-ratio sampling rate conversion, targeted to 4G mobile applications. Expand
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An 1.2V 440-MS/s 0.13-µm CMOS pipelined Analog-to-Digital Converter with 5-8bit mode selection
TLDR
In this paper, an 8-bit (with 5-8bit mode selection), 440-MS/s pipelined Analog-to-Digital Converter (ADC) is presented. Expand
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A 5.8-Gbps low-noise scalable low-voltage signaling serial link transmitter for MIPI M-PHY in 40-nm CMOS
TLDR
A scalable low-voltage signaling (SLVS) serial link transmitter for MIPI M-PHY is presented in this paper. Expand
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A 30-dBm Class-D Power Amplifier with On/Off Logic for an Integrated Tri-Phasing Transmitter in 28-nm CMOS
TLDR
This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. Expand
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A Scalable Low-Voltage Signaling (SLVS) Driver for a Low-Power MIPI M-PHY Serial Link in 40 nm CMOS
TLDR
This paper presents the design and simulations of a scalable low-voltage signaling (SLVS) type output driver for a MIPI M-PHY serial link. Expand
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Single and two-stage OTAs for high-speed CMOS pipelined ADCs
  • T. Nieminen, K. Halonen
  • Mathematics, Computer Science
  • 20th European Conference on Circuit Theory and…
  • 13 October 2011
TLDR
This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit MDAC. Expand
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