Tayab D. Memon

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This paper describes the design and implementation of a single-bit FIR Filter with balanced ternary coefficients (i.e. -1/0/+1) aimed at general DSP applications. The fixed filter coefficients were computed using a sigma delta modulation technique. The filter is based on a hierarchical adder structure that can be pipelined for high performance that has been(More)
While one-bit ΣΔ modulators are widely used in Analog to Digital conversion stages due to their inherent linearity and precision, it is less common for the entire digital processing path to operate in single bit mode at the oversampled rate of the conversion system. The conventional approach has been to decimate the signal bit stream after conversion and(More)
In developing countries Doctors or Physicians don’t like to go to the rural areas and people of rural (backwards) areas are not facilitated up to the mark. Thus the disaster situation occurs when these people are transferred to the city hospital for tertiary and mostly even for primary care. Advancement in the field of communications provided the solution(More)
Recently single-bit ternary FIR-like filter (SBTFF) hardware synthesize in FPGA is reported and compared with multi-bit FIR filter on similar spectral characteristics. Results shows that SBTFF dominates upon multi-bit filter overall. In this work, we have adopted ternary sigma-delta modulated arithmetic adder (i.e., improved ternary adder (ITA)) and(More)
FIR filters can be easily designed by PSO algorithm because it improves the solution characteristics and introduces a new technique for updating swarm's velocity vector and position. In this paper FIR filter is designed using PSO algorithm effectively and then implemented in FPGA using STARTIX-II and Cyclone-II devices for comparison. Error between Ideal(More)
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