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This paper presents an accurate and fast technique for the estimation of on-resistance (RDS(on)) of large lateral power MOSFET switch layouts in on-chip DC-DC converter and determination of the current distribution pattern in the switch layouts. In the proposed approach an extracted netlist is created which consists of the lumped parasitic resistances(More)
This paper presents a technique to study and estimate the dc performance of lateral power MOSFET switches used in on-chip dc-dc converters. The dc performance is characterized by the on-resistance and current distribution profile in the switch layout. In the proposed approach, a netlist is generated that consists of the parasitic resistances extracted from(More)
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