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This paper describes Evolvable Hardware (EHW) with genetic learning. EHW is hardware which is built on programmable logic devices (e.g. PLD and FPGA) and whose architecture can be reconfigured by… Expand
This paper describes a function-level Evolvable Hardware (EHW). EHW is hardware which is built on programmable logic devices (e.g. PLD and FPGA) and whose architecture can be reconfigured by using a… Expand
This paper describes Evolvable Hardware (EHW) and its applications to pattern recognition and fault-torelant systems. EHW can change its own hardware structure to adapt to the environment whenever… Expand
Abstract An evolution method for the solution of a mix design problem is proposed. It is an application of genetic algorithms in which the ratio of ingredients have evolved. In this paper, the… Expand
This paper describes a parallel associative processor, IXM2, developed mainly for semantic network processing. IXM2 consists of 64 associative processors and 9 network processors having a total of… Expand
This paper describes an investigation into the effectiveness of a lookahead model based upon a recurrent neural network. An action network and an internal model of the environment are incorporated… Expand