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- Publications
- Influence
Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems
- C. Ferri, S. Wood, Tali Moreshet, R. I. Bahar, M. Herlihy
- Computer Science
- J. Parallel Distributed Comput.
- 1 October 2010
TLDR
Energy efficient synchronization techniques for embedded architectures
- C. Ferri, Amber Viescas, Tali Moreshet, R. I. Bahar, M. Herlihy
- Computer Science
- GLSVLSI '08
- 4 May 2008
TLDR
Energy reduction in multiprocessor systems using transactional memory
- Tali Moreshet, R. I. Bahar, M. Herlihy
- Computer Science, Medicine
- ISLPED '05. Proceedings of the International…
- 8 August 2005
TLDR
Energy-Aware Microprocessor Synchronization : Transactional Memory vs . Locks
One important way in which multiprocessors differ from uniprocessors is in the need to provide programmers the ability to synchronize concurrent access to memory. Transactional memory was proposed as… Expand
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SoC-TM: Integrated HW/SW support for transactional memory programming on embedded MPSoCs
- C. Ferri, A. Marongiu, +4 authors M. Herlihy
- Computer Science
- Proceedings of the Ninth IEEE/ACM/IFIP…
- 9 October 2011
TLDR
Edge-TM
- Dimitra Papagiannopoulou, A. Marongiu, Tali Moreshet, M. Herlihy, R. I. Bahar
- Computer Science
- ACM Trans. Embed. Comput. Syst.
- 27 September 2017
TLDR
A hardware/software framework for supporting transactional memory in a MPSoC environment
- C. Ferri, Tali Moreshet, R. I. Bahar, L. Benini, M. Herlihy
- Computer Science
- CARN
- 1 March 2007
TLDR
Speculative synchronization for coherence-free embedded NUMA architectures
- Dimitra Papagiannopoulou, Tali Moreshet, A. Marongiu, L. Benini, M. Herlihy, R. I. Bahar
- Computer Science
- International Conference on Embedded Computer…
- 14 July 2014
TLDR
Playing with Fire: Transactional Memory Revisited for Error-Resilient and Energy-Efficient MPSoC Execution
- Dimitra Papagiannopoulou, A. Marongiu, Tali Moreshet, L. Benini, M. Herlihy, R. I. Bahar
- Engineering, Computer Science
- ACM Great Lakes Symposium on VLSI
- 20 May 2015
TLDR
IgnoreTM: Opportunistically Ignoring Timing Violations for Energy Savings using HTM
- Dimitra Papagiannopoulou, S. Whang, Tali Moreshet, R. I. Bahar
- Computer Science
- Design, Automation & Test in Europe Conference…
- 25 March 2019
TLDR