Talat Altaf

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With the advent of multi-cores every processor has built-in parallel computational power and that can only be fully utilized only if the program in execution is written accordingly. This study is a part of an ongoing research for designing of a new parallel programming model for multi-core architectures. In this paper we have presented a simple, highly(More)
After the successful implementation of the dual and quad core processors, the designers are now thinking to place hundreds or even thousand of cores on a single chip. But this practice may lead to many basic and fundamental restrictions like interconnection of cores, memory size and its access patterns, cache design, number of cache levels etc. To overcome(More)
—The processor-memory speed gap referred to as memory wall, has become much wider in multi core processors due to a number of cores sharing the processor-memory interface. In addition to other cache optimization techniques, the mechanism of prefetching instructions and data has been used effectively to close the processor-memory speed gap and lower the(More)
We derive probability of detection P d and false alarm P f for spectrum sensing cognitive devices, employing correlated multiple antenna elements using linear test statistic. Detection performance of such sensors is severely degraded due to the correlation among antennas, in addition to that fading channel conditions may further deteriorate the performance.(More)
— With the arrival of multi-cores, every processor has now built-in parallel computational power and that can be fully utilized only if the program in execution is written accordingly. This study is a part of an ongoing research for designing of a new parallel programming model for multi-core processors. In this paper we have presented a combined parallel(More)
Operating system plays a major role in effective memory management and has a significant impact on the performance of applications. In a Chip Multiprocessor, the on-chip memory hierarchy is an important resource that plays a significant role in determining the overall performance of an application. In addition to a number of hardware optimization techniques(More)
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