Takuya Iwahashi

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We propose a vector-pipeline processor VP-DSP for low-rate videophones, which can encode and decode 10 frames/sec. of QCIF through a 29.2kbps low-rate line. We have already fabricated a VP-DSP LSI by a 0.35 um CMOS process. The area of the VP-DSP core is 4.2mm. It works properly at 25MHz/1.6V with the power dissipation of 49mW. Its peak performance is up to(More)
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