Takeshi Ohkawa

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A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for single chip emulation system is developed. It demonstrates the sequential execution of sub-circuits divided from original circuit, by newly developed Temporal Communication Module (TCM). In order to accelerate emulation speed, a logic element, which can reduce configuration(More)
A platform for networked FPGA system design, which is named "ORB Engine", is proposed to add more controllability and design productivity on FPGA-based systems composed of software and hardwired IPs. A developer can define an object-oriented interface for the circuit IP in FPGA, and implement the control sequence part using Java. The circuit IP in FPGA can(More)
To achieve performance improvement by using multi-core processor, efficient utilization of thread-level parallelism is essential. However, conventional parallel processing cannot efficiently utilize potential parallelism within program code, since there are various dependencies within program code to be kept strictly. For this problem, speculative parallel(More)