Takeshi Kumaki

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SUMMARY This paper presents a scalable FPGA/ASIC implementation architecture for high-speed parallel table-lookup-coding using multi-ported content addressable memory, aiming at facilitating effective table-lookup-coding solutions. The multi-ported CAM adopts a Flexible Multi-ported Content Addressable Memory (FMCAM) technology, which represents an(More)
In current super scalar processors, branch target buffer (BTB) is an important component for predicting branch target addresses. In deeper pipelines and large windows, BTB mis-prediction increases penalty. Hence, increasing the accuracy of BTB prediction became more important for enhancing the performance in current processors. This paper proposes a novel(More)
This paper presents a ternary multi-ported content addressable memory (CAM) architecture utilizing asynchronous multiple search-operation technology, aiming at efficient high throughput of associative-search operations. The asynchronous multiple search-operation technology adopts a Flexible Multi-ported Content Addressable Memory (FMCAM) architecture, which(More)