Takashi Miyamori

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Recently, computer architectures that combine a recon gurable (or retargetable) coprocessor with a general-purpose microprocessor have been proposed. These architectures are designed to exploit large amounts of ne grain parallelism in applications. In this paper, we study the performance of the recon gurable coprocessors on multimedia applications. We(More)
This paper describes a new recon gurable processor architecture called REMARC (Recon gurable Multimedia Array Coprocessor). REMARC is a recon gurable coprocessor that is tightly coupled to a main RISC processor and consists of a global control unit and 64 programmable logic blocks called nano processors. REMARC is designed to accelerate multimedia(More)
Soybean-derived phosphatidylserine (Soy-PS) is a phosphatidylserine made from soybean lecithin by enzymatic reaction with L-serine. A double-blind, randomized controlled study was conducted to investigate the effects of Soy-PS on the cognitive functions of the elderly Japanese subjects with memory complaints. Seventy-eight elderly people with mild cognitive(More)
A single-chip MPEG-2 MP@ML codec, integrating 3.8M gates on a 72-mm die, is described. The codec employs a heterogeneous multiprocessor architecture in which six microprocessors with the same instruction set but different customization execute specific tasks such as video and audio concurrently. The microprocessor, developed for digital media processing,(More)