Takanori Komuro

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This paper describes sampling clock jitter effects in digital-to-analog converters. A formula for the output error power due to sampling clock jitter for a sinusoidal input is derived and verified by numerical simulations, and its spectrum characteristics is shown. Also its effects on DAC SNR is clarified by numerical simulation as follows: (i) When the(More)
—This paper describes a system for measuring total harmonic distortion (THD) signal components between 1 and 100 MHz at levels down to −130 dBc, which has not been previously achieved. This system consists of mechanically sturdy passive bandpass (BPF) and passive band-elimination (BEF) filters with carefully selected parts. The BPF is used to create a pure(More)
SUMMARY This paper proposes a new approach for analog portion testing, which can meet requirements for high-speed and high-accuracy testing simultaneously with reasonable cost. The key concept of the new method is cooperation of an LSI tester and some circuitry built in a target SoC device. We will explain the operation principle of the proposed method. The(More)
SUMMARY This paper presents a technique for reducing spurious output of balanced modulators used in transmitters and arbitrary wave-form generators. Two-step upconversion is a convenient way to produce a desired single-sideband (SSB) radio-frequency (RF) signal—baseband quadrature I and Q signals (which are analog outputs of direct digital frequency(More)
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