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The C-class MADS box gene AGAMOUS (AG) plays crucial roles in Arabidopsis thaliana development by regulating the organ identity of stamens and carpels, the repression of A-class genes, and floral meristem determinacy. To examine the conservation and diversification of C-class gene function in monocots, we analyzed two C-class genes in rice (Oryza sativa),(More)
The overall throughput of automatic test equipment (ATE) is sensitive to the download time of test data. An effective approach to the reduction of the download time is to compress test data before the download. The authors introduced a test data compression method which outperforms other methods for compressing test data [8]. Our previous method is based on(More)
—This paper describes a new method for extracting both instantaneous and rms sinusoidal jitter from phase-locked loops (PLL) output signals. The method is based on analytic signal theory and utilizes the Hilbert transform to extract phase information from a PLL signal. Both the theoretical basis and fundamental concepts of the new method are explained. A(More)
— This paper proposes an improved method of background calibration that reduces production testing time of mixed-signal ICs. Production testing time typically consists of " calibration convergence time " + " functional testing time after calibration convergence ". The method that is proposed here reduces average calibration convergence time. This method(More)
Molecular genetics has been successful in identifying leaf- size regulators such as transcription factors, phytohormones, and signal molecules. Among them, a ROTUNDIFOLIA4-LIKE/DEVIL (RTFL/DVL) family of Arabidopsis, genes encoding peptides with no secretion-signal sequence, is unique in that their overexpressors have a reduced number of leaf cells(More)
* The VLSI chip in this study has been fabricated in the chip fabrication program of VLSI Design and Education Center (VDEC), the University of Tokyo with the collaboration by Rohm Corporation and Toppan Printing Corporation. Abstract Some open defects in VLSI circuits may cause delay faults, and testing of open defects and delay faults remain difficult(More)
This paper presents the application of a new analytic signal method for measuring several different kinds of clock skew in the clock distribution network of microprocessors. First, key terms are defined, and other existing skew measurement methods are reviewed. Then, detailed steps are given for applying the new method for measuring skew between a master(More)