Tadashi Nakagawa

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A new method for improving the timing yield of field-programmable gate array (FPGA) devices affected by random within-die variation is proposed. By selection of an appropriate configuration from a set of functionally equivalent configurations such that the critical paths do not share same circuit resources on the FPGA, both the average critical path delay(More)
It is well known that the enteric nervous system plays a key role in the generation of gastrointestinal peristaltic movements. Recently, the networks of interstitial cells of Cajal (ICC) have been found to be essential in the generation of spontaneous gastrointestinal movements. However, the role of ICC in the mechanisms involved in the generation of(More)
Flex Power FPGA can flexibly control the operating speed and power consumption by flexible assignment of the threshold voltage to transistor. This paper evaluates the static power consumption and area overhead on various threshold voltage control granularity in the Flex Power FPGA based on specific settings. There is the trade-off relationship between(More)
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories. One of the most important issues in the modern FPGA is the reduction of its static leakage power consumption. Flex Power FPGA, which(More)
Using an embryoid body (EB) culture system, we developed a functional organ-like cluster--a "gut"--from mouse embryonic stem (ES) cells (ES gut). Each ES gut exhibited spontaneous contractions but did not exhibit distinct peristalsis-like movements. In these spontaneously contracting ES guts, dense distributions of interstitial cells of Cajal (c-kit [a(More)
A fully-functional FPGA prototype chip in which the programmable body bias voltage can be individually applied to elemental circuits such as MUXes, LUT and DFF is fabricated using low-power 90-nm bulk CMOS technology and the area overhead, dynamic current, static current and operational speed are evaluated in silicon. In measurements, 10 ISCAS benchmark(More)
The Flex Power FPGA design is presented as a novel FPGA design offering the ability to configure the trade-off between power consumption and speed for each logic element by adjusting the threshold voltage. This design targets the reduction of static power consumption, which has become one of the most important issues in the development of future-generation(More)
A new method for improving the timing yield offield-programmable gate array (FPGA) devices affected by intrinsicwithin-die variation is proposed. The timing variation is reducedby selecting an appropriate configuration for each chip from a setof independent configurations, the critical paths of which do notshare the same circuit resources on the FPGA. In(More)