Tadaaki Tanimoto

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In this paper, we propose a parametric model checking algorithm for a subclass of Timed Automata called Parametric Time-Interval Automata(PTIA). In a PTIA, we can specify upper-and lower-bounds of the execution time (time-interval) of each transition using parameter variables. The proposed algorithm takes two inputs, a model described in a PTIA and a(More)
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus based system while satisfying given end-to-end real-time constraints of the entire system such as throughput and latency constraints. In this paper, we define a bus scenario(More)
In the development of real-time communicating hardware/embedded-software systems, it is frequently the case that we want to refine/optimize the system's internal behavior while preserving the external timed I/O behavior. In such a design refinement, modification of the systems' internal branching structures, as well as rescheduling of internal actions, may(More)
In the development of real-time (communicating) hardware or embedded-software systems, it is frequently the case that we want to refine/optimize the system's internal behavior while preserving the external timed I/O behavior (that is, the interface protocol). In such a design refinement, modification of the systems' internal branching structures, as well as(More)
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