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- T. Tung Le, Jifeng Han, Annette von Jouanne, Kartikeya Mayaram, T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 2006

New power conversion circuits to interface to a piezoelectric micro-power generator have been fabricated and tested. Circuit designs and measurement results are presented for a half-wave synchronousâ€¦ (More)

- Zhimin Li, T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 2007

A continuous-time delta-sigma A/D modulator with 5 MS/s output rate in a 2.5 V 0.25 mum CMOS process is presented. The modulator has a fifth-order single-stage, dual-loop architecture allowing nearlyâ€¦ (More)

- B.E. Owens, Sucharita Adluri, +4 authors T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 2005

Digital noise in mixed-signal circuits is characterized using a scalable macromodel for substrate noise coupling. The noise coupling obtained through simulations is verified with measured data from aâ€¦ (More)

- Anil Samavedam, A. Sadate, Kartikeya Mayaram, T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 2000

This paper describes a design-oriented scalable macromodel for substrate noise coupling in heavily-doped substrates. The model requires only four parameters which can be readily extracted from aâ€¦ (More)

- R. E. Radke, Adrien A A Eshraghi, T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 2000

A new dynamic element matching (DEM) algorithm, referred to as rotated data weighted averaging (RDWA), is implemented in a third-order /spl Sigma//spl Delta/ digital-to-analog converter (DAC) withâ€¦ (More)

- Ravindranath Naiknaware, T. S. Fiez
- IEEE Journal of Solid-State Circuits
- 1999

An efficient automated layout for CMOS transistors in analog circuits is described. The matching requirements are used as the primary constraint on the analog layout; however, parasitic capacitancesâ€¦ (More)

- Scott Hazenboom, T. S. Fiez, Kartikeya Mayaram
- IEEE Journal of Solid-State Circuits
- 2006

This paper examines the substrate noise injected into three different types of 2.4-GHz low-noise amplifiers for both heavily and lightly doped CMOS substrates. The amplifiers include the commonlyâ€¦ (More)

- Ruoxin Jiang, T. S. Fiez
- 2002 IEEE International Solid-State Circuitsâ€¦
- 2002

A fifth-order single-stage ΔΣ modulator achieves 14 b resolution with 8× OSR and 4 MHz conversion bandwidth in a 1.8 V 0.18 μm CMOS process. The DC gain of theâ€¦ (More)

- J. Han, Annette von Jouanne, T. Le, Kartikeya Mayaram, T. S. Fiez
- Nineteenth Annual IEEE Applied Power Electronicsâ€¦
- 2004

Low power devices promote the development of micropower generators (MPGs). This paper presents a novel power conditioning circuit (PCC) that enables maximum power extraction from a piezoelectric MPG.â€¦ (More)

- J. B. Hughes, N. C. Bird, +7 authors PlÃ¡cido RogÃ©rio Pinheiro
- 1999

Another simulation was made, with the circuit simulated in the basic form, without enhancement circuits, assuming G,,,/Gds and CgslCgd ratios of 1000, with the biasing and signal current sourcesâ€¦ (More)