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Journals and Conferences
A good understanding of programming transient of SONOS-type memory devices is essential to achieve better scaling and improve the reliability of these devices. We have developed a novel approach to apply Monte Carlo simulations that reduces the computational time required for such a study significantly. The new scheme was applied to understand the… (More)
For the first time, we will present production-ready heterogeneous charge trap NAND technology based on Silicon Rich Nitride. The competitive product performance, reliability, and manufacturability demonstrated at the 43nm node, in conjunction with the planar cell architecture have laid the foundation for scaling to <; 20nm.
A new approach to modeling the etch process is presented. A structure is represented as a string of nodes connected by line segments. By focusing on the segments we are able to deduce the behavior of the nodes and derive accurate etch models. These etch models handle naturally the rounding of a corner, handle precisely discontinuities due to material… (More)