T. J. Thornton

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The authors demonstrate that silicon-on-insulator (SOI) MESFETs can be fabricated alongside SOI CMOS with no changes to the foundry process flow. The MESFETs operate in depletion mode with a threshold voltage of -0.6 V for a gate length of 0.6 mum. The breakdown voltage of the MESFETs greatly exceeds that of the CMOS devices and varies in the range of 12-58(More)
We have measured the physical properties and resistivity of nickel germanide thin films formed by the rapid thermal annealing of nickel metal on p-type germanium substrates. Rutherford back scattering and high-resolution electron diffraction confirm that the stoichiometry of the resulting nickel germanide film corresponds to NiGe and has an orthorhombic(More)
Ultrathin channel metal-semiconductor field-effect-transistors (MESFETs) have been fabricated using fully depleted silicon-on-insulator CMOS foundries with no changes to the process flow. The Schottky gate of the MESFET is formed from a metal silicide that consumes most of the thin ( < 50 nm) FD-SOI channel and fully depletes the remaining underlying(More)
Fully integrated MESFETs have been shown to work on multiple commercial silicon-on-insulator (SOI) and silicon-on-sapphire (SOS) CMOS processes without changing a step in the process flow [1–3]. The unique features of the MESFET including depletion mode operation, breakdown voltages in excess of 50 V, and easy to adjust, but well controlled threshold(More)
Metal semiconductor field effect transistors (MESFETs) have been fabricated using a silicon-on-insulator (SOI) CMOS process. The MESFETs make use of a TiSi/sub 2/ Schottky gate and display good depletion mode characteristics with a threshold voltage of -0.5 V. The drain current can also be controlled by a voltage applied to the substrate, which then behaves(More)
This paper is concerned with the 1/f noise characteristics of a new sub-threshold device configuration, the Schottky junction transistor (SJT). Results from 2 mum gate length SJTs confirm the expected sub-threshold d.c. behavior. Room temperature measurements of the drain current noise power spectrum and the gate referred noise power spectrum are presented.(More)
Enhanced voltage silicon metal-semiconductor-field-effect-transistors (MESFETs) have been fabricated on a 45 nm SOI CMOS technology with no process changes. MESFETs scaled to L<sub>g</sub> = 184 nm were fabricated and show a peak f<sub>T</sub> of 35 GHz, current drive of 112 mA/mm and breakdown voltages exceeding 4.5 V whereas the nominal CMOS voltage was(More)
Enhanced voltage SOI MESFETs have been demonstrated on a highly scaled CMOS process. Their DC and RF performance along with reproducibility suggests that they would be ideal in a variety of analog and PA applications. Also, since they can be fabricated alongside the 45nm CMOS [4], they appear suitable for system-on-chip applications as an interface between(More)
We present a transport model, based on the solution of the Boltzmann Transport Equation, for modeling n-channel silicon-on-insulator MOSFETs and MESFETs. All relevant scattering mechanisms for the silicon material system are included in the transport portion of the device simulator. We are able to extract from our simulation data set the low-field electron(More)
Results are presented from measurements and numerical simulations of Schottky junction transistors, a new type of micropower device capable of operating at GHz frequencies in the sub-threshold regime. Detailed measurements of the DC characteristics of a 2 /spl mu/m gate length device agree well with numerical simulations. Measurements of transconductance(More)