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Network-on-chip (NoC) has gained considerable attention over the last few years as a paradigm for implementing communication among the system components embedded in a single chip. As such, there has been an increased need for defining and developing simulation software for carrying out simulation of NoC architectures. In this paper, we present gpNoCsim, a(More)
This paper proposes multiuser channel estimation techniques for space time block coded-orthogonal frequency division multiplexing (STBC-OFDM) systems based on simple blocked pilot grid. The estimation of multiuser channels is based on least square (LS) and minimum mean square estimation (MMSE) schemes. Simulation results, for a slowly faded quasi-static(More)
Accurate channel estimation is necessary to gain the advantage of space time coding for decoding purposes. Most of the previous work on orthogonal frequency division multiplexed (OFDM) channel estimation focused on single user systems. Hence, they are inappropriate in the multiuser communication systems. In this paper, we proposed a novel multiuser channel(More)
In this paper, we consider channel shortening for cyclic-prefixed block transmission system over multiple input multiple output (MIMO) channels. A time domain equalizer (TEQ) is necessary at the receiver front head to mitigate intersymbol interference (ISI). Melsa, Younce, and Rohrs (1996) proposed the most popular MSSNR channel shortening method for single(More)
Time-domain equalizer (TEQ) design for multicarrier transceivers has recently received much attention. In this paper, we consider generalization of one such design method which takes into account the noise observed in discrete multitone (DMT) systems. We propose an iterative TEQ design method which jointly minimize delay spread of the channel and filtered(More)
Improvements in the efficiency and size of DC-DC converters have resulted from advances in components, primarily semiconductors, and improved topologies. One topology, which has shown very high potential in limited applications, is the partial power processing boost technique, wherein a small DC-DC converter output is connected in series with the input bus(More)
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