Swaroop K. Ghosh

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We propose a path to achieve an ambitious target that has never been tried before: a terabyte of on-chip memory for petabit/second of bandwidth with <; 5W of power. Conventional methodology of on-chip memory design is bottom up where the choice of bitcell topology and associated peripherals are predetermined. The resulting memory is sub-optimal and often(More)
Attention is drawn to sound mensural calibration of the electron microscope system. A general understanding of the inherent distorsions is imperative. By using the collinearity condition and a photogrammetric self-calibration technique, one obtains the patterns of scale, radial, tangential and spiral distorsions. These are discussed and fundamental concepts(More)
While non-volatile memories (NVMs) provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM(More)
The paper introduces the concept of orientation entropy for quantifying the propensity of a pixel belonging to the edge. Intensity variation at a pixel is measured as an integral of a logarithmic function over all possible direction which represents the heterogeneity of intensity variation in the neighborhood of that point. This is unlike traditional edge(More)
Swaroop Ghosh Computer Science and engineering, University of South Florida, Tampa, Florida-33647 sghosh@cse.usf.edu ABSTRACT We propose a path to achieve an ambitious target that has never been tried before: a terabyte of on-chip memory for petabit/second of bandwidth with < 5W of power. Conventional methodology of on-chip memory design is bottom up where(More)
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