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Primitive electronic waste (e-waste) recycling has become a growing environmental concern, and toxic heavy metals released from e-waste activities may continue to threaten the health of local people. To study the impact of heavy metals in people around e-waste sites, 349 people from e-waste recycling sites (exposure group) and 118 people from a green(More)
System-on-Chip designs often have a large number of timing domains. Communication between these domains requires synchronization, and the failure probabilities of these synchronizers must be characterized accurately to ensure the robustness of the complete system. We present a novel approach for determining the failure probabilities of synchronizer(More)
Recently, researchers at Rambus proposed a ring-oscillator example as a challenge problem for analog verification: they asked researchers to identify conditions that will ensure that the oscillator is free from lock-up. We present a solution to this challenge problem. Our approach is primarily pencil-and-paper analysis. We prove properties of the oscillator(More)
Surfing is a latchless pipelining technique where the propagation delays of gates and other logic functions are modulated to produce event attractors. We describe a test chip that demonstrates a surfing pipeline ring and then introduce new circuits that dramatically reduce the energy overhead for surfing. Our test chip implements a twelve-stage, surfing(More)
Circuits such as flip-flops, sense amplifiers and synchronizers can exhibit metastability failures that are undetectable given the numerical accuracy limitations of simulators such as HSPICE. We present a novel simulation technique that allows us to generate accurate waveforms for the metastability failures and similar events. We apply our method to two(More)
This study aimed to explore the structural contributions of socioeconomic status (SES), comorbidity, and activity limitation to the healthy life expectancy (HALE) of Japanese suburban elderly. A questionnaire survey was distributed to all residents aged 65 years and older in Tama City, Tokyo, in 2001; a follow-up study was conducted in 2004; and individual(More)
Varactors can be used to control delays and limit ISI-related signal integrity degradation for on-chip global interconnect. This paper presents a varactor-based “near-speed-of-light” interconnect design. In this design, the varactors compensate for delay variations enabling a simple, source-synchronous solution for clock-and-data recovery.(More)