Surya Veeraraghavan

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Outline zIntroduction zTunneling current density zGate tunneling current zDrain bias dependence and partition zModel Verification zConclusions Introduction – Overview z Aggressive scaling of t ox (below 30Å) ⇒ substantial I g in MOSFETs z First principle approach is not suited for compact models z Most of the existing compact models don't include the(More)
This paper reports recent progress on partially depleted (PD) SOI modeling using a surface potential based approach. The new model, called PSP-SOI, is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by(More)
We report the first SOI MOSFET model that takes advantage of the recent progress in bulk MOSFET modeling. The surface-potential-based model is implemented without iterative loops, and includes physical modeling of the moderate inversion region and all small-geometry effects without relying on the traditional threshold-voltage-based formulation. The new(More)
A five-terminal, charge-based model for the thin-film silicon-on-insulator (SOI) MOSFET is implemented in SPICE2, thereby enabling, for the first time, proper simulation and CAD of SOI MOS integrated circuits in which the unique floating-body and back-gate-bias effects can be significant. The implementation is achieved, without having to rewrite the circuit(More)
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