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— Post-silicon validation is a critical part of integrated circuit design methodology. The primary objective is to detect and eliminate the bugs that have escaped pre-silicon validation phase. One of the key challenges in post-silicon validation is the limited observability of internal signals in manufactured chips. A promising direction to improve(More)
In this paper, we propose a test generation method that employs clustering and learning techniques to reduce test generation time in hybrid systems. While learning-oriented test generation is a well-studied problem for digital systems, there are limited efforts for utilizing learning during generation of directed tests for hybrid systems. This paper makes(More)
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