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At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful application of structural at-speed tests. In this paper we characterize these problems on commercial ASICs in order to understand how to implement more effective solutions.
In the proposed method we are test the S27 sequential circuit by using Built in Self Test. This paper describes an on-chip test generation method for functional broadside tests. The hardware was base on the application of primary input sequences initial from a well-known reachable state, therefore using the circuit to produce additional reachable states.(More)
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