#### Filter Results:

- Full text PDF available (8)

#### Publication Year

1988

2016

- This year (0)
- Last 5 years (3)
- Last 10 years (7)

#### Publication Type

#### Co-author

#### Journals and Conferences

#### Key Phrases

Learn More

Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a myriad of problems in formal verification, design, simulation, and testing. Program slicing is a static program analysis technique that allows an analyst to automatically extract… (More)

- Edmund M. Clarke, Masahiro Fujita, Sreeranga P. Rajan, Thomas W. Reps, Subash Shankar, Tim Teitelbaum
- International Journal on Software Tools for…
- 2002

Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a myriad of problems in design, simulation, testing, and formal verification. Program slicing is a static program analysis technique that allows an analyst to automatically extract… (More)

- David Déharbe, Subash Shankar, Edmund M. Clarke
- FMCAD
- 1998

This article describes a prototype implementation of a symbolic model checker for a subset of VHDL. The model checker applies a number of techniques to reduce the search space, thus allowing for efficient verification of real circuits. We have completed an initial release of the VHDL model checker and have used it to verify complex circuits, including the… (More)

- Subash Shankar, Sinan Asa
- UML
- 2003

- Subash Shankar, James R. Slagle
- AAAI/IAAI
- 1997

This article describes a prototype formal verification system for a subset of VHDL. The behavior of a VHDL design can be specified with temporal logic formulas and be verified with an algorithm called symbolic model checking. The model checker applies a number of new techniques to handle larger designs, thus allowing for efficient verification of real… (More)

- Subash Shankar, Masahiro Fujita
- MEMOCODE
- 2008

- Subash Shankar, Sinan Asa, Vladimir Sipos, Xiaowei Xu
- ASE
- 2005

This paper describes a framework that allows for reasoning about and verification of concurrent statecharts with real-time constraints subject to semantic variations. The major problems addressed by this paper include the capture of multiple semantic variations of real-time statecharts, and the use of the resulting semantics for further analysis. Our… (More)

- Subash Shankar
- ICFEM
- 2002

- Subash Shankar, James R. Slagle
- CHARME
- 1997