Steven P. Vanderwiel

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The expanding gap between microprocessor and DRAM performance has necessitated the use of increasingly aggressive techniques designed to reduce or hide the latency of main memory access. Although large cache hierarchies have proven to be effective in reducing this latency for the most frequently used data, it is still not uncommon for many programs to spend(More)
The past decade has seen enormous strides in microprocessor fabrication technology and design methodology. As a result, CPU performance has outpaced that of dynamic RAM, the primary component of main memory. This expanding gap has required developers to use increasingly aggressive techniques to reduce or hide the large latency of main-memory accesses. The(More)
Several parallel programming languages, libraries and environments have been developed to ease the task of writing programs for multiprocessors. Proponents of each approach often point out various language features that are designed to provide the programmer with a simple programming interface. However, virtually no data exists that quantitatively evaluates(More)
Several parallel programming languages, libraries and environments have been developed to ease the task of writing programs for multiprocessors. Proponents of each approach often point out various language features that are designed to provide the programmer with a simple programming interface. However, virtually no data exist that quantitatively evaluates(More)
It is commonly assumed that if a programmer is willing to invest the potentially significant effort required to port an application program to run on a multiprocessor system using a low-level parallel language or library, they will be able to take advantage of a larger degree of parallelism to achieve higher performance than when using a higher-level(More)
and have found that it is complete and satisfactory in all respects, and that any and all revisions required by the final examining committee have been made ABSTRACT Scientific and other data-intensive applications often generate memory referencing patterns that exhibit little data reuse, resulting in poor cache utilization and run-times that can be(More)