Steven H. Voldman

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Foundation of rf CMOS and SiGe BiCMOS technologies This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal(More)
− Failure analysis is fundamental to the design and development methodology of electrostatic discharge (ESD) devices and ESD robust circuits. The role of failure analysis (FA) in the models, methodology, band mechanisms evaluation for improving ESD robustness of semiconductor products in CMOS, silicon-on-insulator (SOI) and silicon germanium (SiGe)(More)
Dramatic changes and paradigm shifts are presently occurring in the area of electrostatic discharge (ESD) testing of semiconductor chips and systems which may have significant influence on the semiconductor industry. New semiconductor chip tests that have traditionally been regarded as system level events are now being proposed as requirements on(More)
  • S. H. Voldman
  • 2012
Electrostatic discharge (ESD) protection and latchup issues in three dimensional (3-D) semiconductor chip systems is discussed for the first time. ESD protection in 3-D multi-chip systems will be important for both memory and system-on-chip (SOC) applications. Two types of 3-D semiconductor chips will be discussed; a first version introduces edge wiring,(More)