Steven C. Suddarth

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VIGILANTE consists of two major components: 1) the Yiewing Jrnager/Qimballed Instrumentation Laboratory ultraviolet sensors with appropriate optics and camera electronics (VIGIL)-advanced infrared, visible, and 2) the Analog Neural Ihree-dimensional processing Experiment (ANTE)-a massively parallel, neural network-based, high-speed processor, The powerful(More)
VIGILANTE is an ultrafast smart sensor testbed for automatic target recognition (ATR) applications with a series of capability demonstration focused on a cruise missile defense (CMD) scenario. VIGILANTE'S sensor/processor architecture is based on next-generation UV/visible/IR sensors and a tera-operations per second sugar-cube processor, as well as(More)
iv DEDICATION To my father, Dr. D. Prasada Rao, my motivation personified. He, a tireless teacher by virtue and profession has taught me to succeed and complete the most formidable tasks by setting himself as an example. To my mother, D. Lakshmi Kantham for all her prayers and unconditional love. To my brother, D. Naga Ravi Kanth for always being there when(More)
Energy harvesting systems are becoming more attractive for remote sensing applications. In this paper, we propose a new technique that performs the voltage scaling in conjunction with frequency scaling to achieve ultra low power design in ASIC/FPGA. To detect errors and obtain the corrected data without any loss in performance, a delayed clock flip-flop is(More)
Summary form only given, as follows. A method is proposed for using a multilayer network, such as one trained using backpropagation as an associative memory. Such networks may be used for a variety of purposes, of which two principal applications could be a nonlinear associative memory with fast convergence, or as a means for testing multilayered systems(More)
AIIS3'RACT VIGI 1,ANI'E IS an ultrafast smart sensor testbcd for generic Automatic Target Recognition (ATR) applications with a series of capability demonstration focussed on cruise missile defense (CMIJ). VIG1l.AN'1%'S sensor/processor architecture is based on next-generation lJV/visible/l R semors and a tcra-operations per second sugar-cube processor, as(More)
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