Measurements on a prototype chip, implemented in a 150nm logic process technology, validate the theories for two sub-1V MOS reference current generator circuits and show that 2X reduction in current variation is achievable across extremes of both process and temperature.
Fluctuations in intrinsic linear V<inf>t</inf>, free of impact of parasitics, are measured for large arrays of NMOS and PMOS devices on a testchip in a 150nm logic technology. Local intrinsic σV<inf>T</inf>, free of extrinsic process, length and width variations, is random, and worsens with reverse body bias. Although the traditional area-dependent… (More)
Challenge and conflict are elements that all game designers strive to engineer into their games. Research shows that challenge is what drives a high proportion of games players yet there are few published tools that can be used to assist the game designer in constructing useful challenges and conflict leading many new game designers to resort to the 'tried… (More)