Stephan Henzler

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Quasi adiabatic circuits like the efficient charge recovery logic (ECRL) are known to reduce dynamic power dissipation of digital CMOS circuits significantly. The possible operation frequencies have been continuously increased due to technology scaling. Anyway, the field of operation is limited to medium performance applications. If it was possible to(More)
A CMOS divider concept without static power consumption, except leakage power, is proposed. The circuit divides an input signal by two and generates four phases with highly accurate phase skew of $90$ degrees. In a 90nm low-power CMOS technology, the maximum operation frequency is 11.6 GHz for a supply voltage of 1.5V slow process and worst case operation(More)
Based on product related scenarios, the impact of on-chip inductance on power supply integrity is analyzed. The impact of varying current profiles is shown to be minimal. In a regular power grid with regular bump connections, the impact of on-chip inductance on the cycle average of the supply voltage can be neglected, even for a worst case estimation of(More)