A 5.5 GHz fully integrated low-power ESD-protected low-noise amplifier (LNA), designed and verified in a 90 nm RF CMOS technology, is presented for the first time. This 9.7 mW LNA features a 13.3 dB power gain with a noise figure of 2.9 dB, while maintaining an input return loss of −14 dB.
This work analyzes the radio frequency (RF) performance of 60-nm gate length finFETs, for which the DC behavior exhibits reduced SCE. The RF analysis is carried out as a function of the gate length as well as the fin width (W<sub>fin</sub>). Cut off frequencies (f<sub>t</sub>, f <sub>max</sub>) on the order of 100 GHz are reported for the first time. It is… (More)
The European project DOTFIVE<sup>1</sup>  is a 3-year project targeting a 0.5 THz SiGe Heterojunction Bipolar Transistor for the future development of communication, imaging and radar applications. The project proceeds along two paths. It explores further evolutionary scaling of self-aligned selective epitaxial base HBTs, and advanced process modules and… (More)
This paper addresses the ESD reliability issues in RFICs, focusing on the technology impact on the device and design. We also present the basic RF ESD protection methods used in industry. Presents the general topology of a 5 GHz LNA, which is protected using several ESD protection methodologies, and describes the 90 nm CMOS process technology used for the… (More)
Above-IC inductors enable low-power RF circuit design, and in addition efficiently protect the RF pins against electrostatic discharge (ESD) stress. This is demonstrated using above-IC inductors in the design of a fully integrated 5 GHz ESD-protected LNA and VCO in 90 nm CMOS. The LNA without ESD protection shows 1.4 dB NF, with 18 dB gain, drawing 4 mA… (More)
—This paper reports on an extensive analysis of the trapping processes and of the reliability of experimental AlGaN/ GaN MIS-HEMTs, grown on silicon substrate. The study is based on combined pulsed characterization, transient investigation , breakdown, and reverse-bias stress tests, and provides the following, relevant, information: 1) the exposure to high… (More)
—Comparison of digital and analog figures-of-merit of FinFETs and planar bulk MOSFETs reveals an interesting trade-off in the analog/RF design space. It is found that FinFETs possess the following key advantages over bulk MOSFETs: reduced leakage , excellent subthreshold slope, and better voltage gain without degradation of noise or linearity. This makes… (More)