Steeven Singh

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Following the design trend of integrated receivers, the direct downconversion (DD) principle is investigated from radar system-level perspective, but with a strong focus on the analog mechanisms. While most modern radar receivers favor a digital downconversion to avoid I/Q mismatches, they demand discrete realization and larger form factors. Recent advances(More)
Multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR Filters, Digital Signal Processors, and Multiprocessors. In the proposed work, the Multiple Constant Multiplication / Accumulation (MCMA) block of FIR filter is implemented using Xilinx 14.1 Simulator. High speed multiplication is performed using Column(More)
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