Stanley Habib

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Run-time Alias Disambiguation (RTD) has been proposed as a technique for pointer aliasing. This paper suggests several RTD approaches which may be used for DOACROSS scheduling to exploit coarse-grained parallelism. We analyze the rerollability problem in the transformation of those RTD approaches to software pipelining in order to exploit the instruction(More)
Beijii loo084 Chim ABSTRACT We propose a VLIW architectural model for optimal execution of branch-intensive loops as well as a new single-chip architecture URPR-2 for digital signal and image processing based on this model. In this architecture the instructions belonging to different iterations and different paths can be executed simultaneously. Instruction(More)
There have been several machine designs using microproprammed control which interpretively execute intermediate code such as P code and earlier version such as POPS. The recently announced Modula language uses M code as an intermediate language This paper describes how an AM-DAM2900 bit slice aechitecture was used to implement the interpretive execution of(More)
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