Srinivas Jallepalli

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Traditional techniques for statistical analysis of rare events require a good understanding of the dependence of the outputs on the independent input variables. This can sometimes be an insurmountable challenge, especially when the dimensionality of the input variation space is high. In this paper, we present an innovative scaled sigma sampling (SSS)(More)
Spiraling costs of a product revision demand that we mitigate risks to product yield due to unintended disconnects between SPICE models used for design and production silicon, and intentional process retargeting for product performance optimization. This often necessitates product robustness to about +/-4.0-sigmas or about 60 ppm. However, the computational(More)
Device architectures incorporating multiple gate structures have been proposed to allow transistor scaling beyond the planar MCSFET integrations. These device architectures can improve performance such as better short channel performance and reduced leakage. In addition the additional channel surface and gate electrodes offers new circuit possibilities such(More)
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