Spiridon Nikolaidis

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In this paper, a modeling technique for CMOS gates, based on the reduction of each gate to an equivalent inverter, is presented. The proposed method can be incorporated in existing timing simulators in order to improve their accuracy. The conducting and parasitic behavior of parallel and serially connected transistors is accurately analyzed and an(More)
In this paper the measurements taken for the development of instruction-level energy models for microprocessors are presented and analyzed. An appropriate measuring environment and a suitable measuring methodology was developed for taking the necessary measurements. The energy of an instruction is defined as a sum of three components. The pure base energy(More)
Edge detection is one of the most fundamental algorithms in digital image processing. The Canny edge detector is the most implemented edge detection algorithm because of its ability to detect edges even in images that are intensely contaminated by noise. However, this is a time consuming algorithm and therefore its implementations are difficult to reach(More)
A current measurement configuration for the estimation of the power consumption of processing systems is presented in this work. The problem addressed is to measure the variations of the power supply current of digital circuits (and especially of embedded processing circuits) and to calculate from these measurements the energy consumption variations(More)
Energy constraints form an important part of the design specification for processors running embedded applications. For estimating energy dissipation early at the design cycle, accurate power consumption models characterized for the processor are essential. A methodology and the corresponding instrumentation setup for taking current measurements to create(More)
Looping operations impose a significant bottleneck to achieving better computational efficiency for embedded applications. In this paper, a novel zero-overhead loop controller (ZOLC) supporting arbitrary loop structures with multiple-entry and multiple-exit nodes is described and utilized to enhance embedded RISC processors. A graph formalism is introduced(More)
Summary form only given. A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts: The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. The novel energy-efficient(More)
A detailed analysis of the transistor chain operation in CMOS gates is introduced. The chain is modeled by a transistor pair, according to the operating conditions of the structure. The system of differential equations for the derived chain model is solved and analytical expressions which accurately describe the temporal evolution of the output voltage are(More)
Processor power savings that can be obtained by the application of data-reuse transformations on multimedia applications are discussed in this paper. Data Transfer and Storage Exploration methodologies primarily aim at memory related power reduction by moving data accesses to smaller memories, which are less power costly. However, it is shown that the(More)