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The PowerPC 603 TM microprocessor is a low-power implementation of the PowerPC Architecture TM . The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 * PLL (Phase Lock Loop) is(More)
Performance modeling was used in conjunction with application CO& traces to tune the PowerPC 603 microprocessor desiga This modeling technique albwed the design space to be constrained by performance, power; and size. 'Ifade-ofs wen? examined with high confidence of performance. Sampled traces provided a f a turnaround for evaluation of the design space.(More)
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