Soliman A. Mahmoud

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Design and simulation of a digitally controlled CMOS fully differential current conveyor (DCFDCC) is presented. A novel current division network (CDN) is used to provide the digital control of the current gain between terminals and of this DCFDCC. The proposed DCFDCC operates under low supply voltage of 1 5 V. The realization of the DCFDCC using the new CDN(More)
This paper presents a new CMOS current feedback operational amplifier (CFOA) with rail to rail swing capability at all terminals. The circuit operates as a class AB for lower power consumption. Besides operating at low supply voltages of 1.5 V, the proposed CFOA has a standby current of 200 A. The proposed CFOA circuit is thus a versatile building block for(More)
A wide-range differential difference operational floating amplifier (DDOFA) is introduced. The DDOFA is a new block useful for continuous-time analog signal processing. The DDOFA is realized using a differential difference transconductor with large signal handling capability and a single input differential output current op-amp. The DDOFA forces two(More)
This paper presents a novel CMOS differential voltage current conveyor based on a wide linear range transconductor with common mode detection. The differential voltage current conveyor exhibits a wide dynamic input range of ±0.9V. It is used to realize an instrumentation amplifier, a multiple input single output filter, and a single input multiple output(More)
This paper presents a novel CMOS low-voltage and low-power positive second-generation current conveyor (CCII+ ). The proposed CCII+ uses two n-channel differential pairs instead of the complementary differential pairs; i.e. (n-channel and p-channel), to realize the input stage. This solution allows almost a rail-to-rail input and output operation; also it(More)
A digitally controlled balanced output transconductor (DCBOTA) is proposed and analyzed. The proposed DCBOTA is based on the BOTA given in Ref. 1 and MOS switches. The DCBOTA transconductance is tunable in a range of 2n−1 times using n bits control word. The proposed DCBOTA is simulated using CMOS 0.35μm technology and the results have shown the feasibility(More)