Simone Zezza

Learn More
SEACAST is a peer-to-peer live streaming protocol developed at Politecnico di Torino, which aims at improving current systems in two key areas. The first is the use of fullfledged flow control using RTP/UDP and session signaling. The second is the use of multiple description coding to handle error resilience and user heterogeneity. In this paper we overview(More)
We present a novel architecture for complexity-adaptive Random Network Coding (RNC) and its application to Peer-to-Peer (P2P) video streaming. Network coding enables the design of simple and effective P2P video distribution systems, however it relies on computationally intensive packet coding operations that may exceed the computational capabilities of(More)
In this paper we investigate the complexity of a modified MQ arithmetic decoder architecture for error resilient JPEG2000 applications, based on the concept of ternary arith­ metic decoder employing aforbidden symbol. Such ternary coding schemes have been already investigated to prove its excellent figures in terms of both PSNR and visual quality. However(More)
Entropy coding, and specifically arithmetic codes are particularly sensitive to bit errors. Indeed, due to the memory inherent to the arithmetic coding a single flipped bit may cause desynchronization of the decoder, hence all the remaining symbols can be erroneous. In this paper a detailed study of complexity, for a known in literature correction(More)
To improve the JPEG2000 compression standard error resiliency in the wireless environment, the use of ternary MQ arithmetic coders/decoders that are based on the concept of forbidden symbol has been proposed. This paper presents two ternary MQ based techniques to reduce both the computational complexity and the memory requirement during the decoding(More)
In this paper we propose an efficient VLSI implementation of a Soft Input Soft Output (SISO) arithmetic code (AC) decoder for joint source channel coding. The addressed application shows a very high level of processing complexity, but, to the best of our knowledge, no papers have been published in the literature on the hardware implementation of the(More)
This paper proposes for the first time, the very large scale integration (VLSI) architectural techniques for error resilient joint source channel coding (JSCC) of arithmetic codes (AC). When implemented on a 0.13 µm standard cells technology running at 340 MHz, achieves a decoding throughput of up to 125 kbit/s, 58 times better than the standard(More)