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The aim of this work is the design of a digital pulse density modulation control for switch mode power supplies. It is based on a third order sigma-delta modulator controlling a DC- DC buck-converter to be used in integrated circuit applications, but can be straightforwardly applied to other type of converters. The performance of the controller are compared(More)
The specification on power consumption of a digital system is extremely important due to the growing relevance of the market of portable devices and must be taken into account since the early phases of a complex System-on-Chip design. In this paper some guidelines are provided for the integration of the information on power consumption in the executable(More)
Sport, fitness, as well as rehabilitation activities, often require the accomplishment of repetitive movements. The correctness of the exercises is often related to the capability of maintaining the required cadence and muscular force. Failure to maintain the required force, also known as muscle fatigue, is accompanied by a shift in the spectral content of(More)
— A rigorous formulation of the parametric yield for very large scale integration (VLSI) designs including the mismatch effect is proposed. The theory has been carried out starting from a general statistical model relating random variations of device parameters to the stochastic behavior of process parameters. The model predicts a dependence of correlation,(More)
Bus performances are extremely important in a platform-based design. System Level analysis of bus performances gives important information for the analysis and choice between different architectures driven by functional, timing and power constraints of the System-on-Chip. This paper presents the effect of different arbitration algorithms and bus usage(More)
In this paper a simulator for the statistical analysis of analog CMOS integrated circuits affected by technological tolerance effects, including device mismatch, is presented. The tool, able to perform dc, ac, and transient analyses, is based on a rigorous formulation of circuit equations starting from the modified nodal analysis and including random(More)
High level design methodologies are needed to overcome the complexity of System on Chip design. In this paper the SystemC environment has been used to design a Bluetooth transceiver. The high simulation speed allowed a high level performance analysis of the IP developed and the definition of an algorithm for selecting the best packet type in presence of(More)
This paper presents a simulator for the statistical analysis of MOS integrated circuits a ected by mismatch e ect. The tool is based on a rigorous formulation of circuit equations including random current sources to take into account technological tolerances. The simulator requires a simulation time of several orders of magnitude lower than that required by(More)