Simone Orcioni

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The specification on power consumption of a digital system is extremely important due to the growing relevance of the market of portable devices and must be taken into account since the early phases of a complex System-on-Chip design. In this paper some guidelines are provided for the integration of the information on power consumption in the executable(More)
— A rigorous formulation of the parametric yield for very large scale integration (VLSI) designs including the mismatch effect is proposed. The theory has been carried out starting from a general statistical model relating random variations of device parameters to the stochastic behavior of process parameters. The model predicts a dependence of correlation,(More)
Bus performances are extremely important in a platform-based design. System Level analysis of bus performances gives important information for the analysis and choice between different architectures driven by functional, timing and power constraints of the System-on-Chip. This paper presents the effect of different arbitration algorithms and bus usage(More)
This paper presents a simulator for the statistical analysis of MOS integrated circuits a ected by mismatch e ect. The tool is based on a rigorous formulation of circuit equations including random current sources to take into account technological tolerances. The simulator requires a simulation time of several orders of magnitude lower than that required by(More)
reuse any copyrighted component of this work in other works must be obtained from the IEEE. Abstract—In this paper a simulator for the statistical analysis of analog CMOS integrated circuits affected by technological tolerance effects, including device mismatch, is presented. The tool, able to perform dc, ac, and transient analyses, is based on a rigorous(More)
A mixed analog-digital fuzzy logic inference processor chip, designed in a 0.35-m CMOS technology, is presented. The analog fuzzy engine is based on a novel current-mode CMOS circuit used for the implementation of fuzzy partition membership functions. The architecture consists of a 3 inputs 1 output analog fuzzy engine, internal digital registers to store(More)