Simon S. Singh

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All synchronous CMOS integrated systems have to pay some sequencing overhead. This overhead includes the skew and the jitter of the clock. It also includes the setup time and the clock-to-output delay of the flip-flops. This paper discusses how much energy should be allocated for sequencing in these systems. It is pointed out that providing too little(More)
A comparative study is given on the reliability of different possible network configurations for computer communications in large-scale accelerator systems, with the focus on bus, double ring, and switching hub networks. The measure of reliability is based on the computation of the probability that all nodes in the network are operative and can communicate(More)
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