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This paper presents a new experimental setup (to our knowledge, the first ever) and results obtained with that setup from which we report extra combinational delays in an SRAM FPGA (Virtex-5) due to… Expand
Experimental means to characterize delay faults induced by bit flips and SEUs in I/O blocks of SRAM-based FPGAs are proposed. A delay fault up to 6.2ns sensitized by an events chain is reported.
This paper aims at characterizing additional delays induced by ionizing radiation in Input/Output Blocks (IOBs) of Static Random-Access Memory Based Field Programmable Gate Arrays (SRAM-Based FPGAs),… Expand
Whereas the use of FPGAs in aerospace applications is increasing, concerns about its sensitivity to radiations more particularly the single event upsets (SEU) in SRAM-based FPGA is enhanced as well.… Expand
This paper presents the results of investigations on the susceptibility of routing network in SRAM-based field-programmable gate arrays (FPGAs) exposed to ionizing neutron radiation creating… Expand