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1. Abstract We are integrating language-based sofhvare and hardware behaviors in Upthreads and Verilog for unrestricted peer execution of the domains, including bounded (finite) and unbounded notions of computer system modeling. Since we do not restrict the modeling currently available in each domain, our co-specit?cation is inclusive of both reactive and(More)
The Codesign Virtual Machine (CVM) is introduced as a next generation system modeling semantic. The CVM permits unrestricted system-wide software and hardware behaviors to be designed to a single scheduling semantic by resolving time-based (resource) and time-independent (state-interleaved) models of computation. CVM hierarchical relationships of bus and(More)
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and software behaviors so that software models with conceptually unbounded state and execution time are resolved with hardware resources. The novel mechanisms that result in frequency interleaving are a shared memory foundation for all system modeling (from gates(More)
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