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We present detailed experimental work involving a commercially available large scale shared memory MIMD paraliel computer having a software controlled cache coherence mechanism. The implementation of a scalable MIMD computer with hardware-controlled coherent shared hierarchical memory is indeed a formidable task and has yet to be effectively implemented. We… (More)
We present a strudy that accentuates the performance and scalability aspects of directory-based cache coherence in multiprocessor systems.